[PATCH V2 1/1] dmaengine/amba-pl08x: Add support for s3c64xx DMAC

[Alim Akhtar]

On Wed, Sep 28, 2011 at 3:24 PM, Viresh Kumar <viresh.kumar at st.com> wrote:
> On 9/28/2011 2:20 PM, Alim Akhtar wrote:
>> The main difference between Primecell PL080 and samsung variant is in
>> LLI control register bit [0:11] is reserved in case of samsung pl080
>> and one extra register is add to hold the transfer size at offset
>> 0x10. The purpose of cctl1 is store the transfer_size.
>
> So, actually you need to modify pl08x_fill_lli_for_desc() and
> pl08x_cctl_bits() routines.
>
I did Modified pl08x_cctl_bits(), but for some reason i reverted it back.
what i was doing something like returning just __retbits__ instead of
retbits |= tsize << PL080_CONTROL_TRANSFER_SIZE_SHIFT;
and doing the below for the __non-s3c__ controllers in the
pl08x_fill_lli_for_desc().
cctl |= 1 << PL080_CONTROL_TRANSFER_SIZE_SHIFT;
pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl);

Do you think that will help?
basically i need to extract transfer_size from the cctl and write back
to the cctl1.

> Updating cctl1 on the last lli will not solve your purpose,
> and transfers needing more than one lli will fail.
> BTW, did you try testing your patch for more than one LLI.
>
point taken, i was testing with max 4095 bytes of data, which needs a
single LLI.

> --
> viresh
>