[PATCH v2 1/2] mmc: sdhci-s3c: add default controller configuration

[Kukjin Kim]

Thomas Abraham wrote:
> 
> The default controller configuration which was previously setup by
> platform helper functions is moved into the driver.
> 
> Cc: Ben Dooks <ben-linux at fluff.org>
> Signed-off-by: Thomas Abraham <thomas.abraham at linaro.org>

Acked-by: Kukjin Kim <kgene.kim at samsung.com>

Hi Chris,

This is ok to me. Could you please pick this up in your tree so that I can
pick 2nd patch up in my tree.

As you know, this patch has no dependency with patch2/2 so that you can
handle without any conflicts.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim at samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

> ---
>  drivers/mmc/host/sdhci-s3c.c |   28 +++++++++++++++++-----------
>  1 files changed, 17 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
> index 2bd7bf4..d891682 100644
> --- a/drivers/mmc/host/sdhci-s3c.c
> +++ b/drivers/mmc/host/sdhci-s3c.c
> @@ -203,17 +203,23 @@ static void sdhci_s3c_set_clock(struct sdhci_host
*host,
> unsigned int clock)
>  		writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
>  	}
> 
> -	/* reconfigure the hardware for new clock rate */
> -
> -	{
> -		struct mmc_ios ios;
> -
> -		ios.clock = clock;
> -
> -		if (ourhost->pdata->cfg_card)
> -			(ourhost->pdata->cfg_card)(ourhost->pdev, host-
> >ioaddr,
> -						   &ios, NULL);
> -	}
> +	/* reprogram default hardware configuration */
> +	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
> +		host->ioaddr + S3C64XX_SDHCI_CONTROL4);
> +
> +	ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
> +	ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
> +		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
> +		  S3C_SDHCI_CTRL2_ENFBCLKRX |
> +		  S3C_SDHCI_CTRL2_DFCNT_NONE |
> +		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
> +	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
> +
> +	/* reconfigure the controller for new clock rate */
> +	ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
> +	if (clock < 25 * 1000000)
> +		ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 |
> S3C_SDHCI_CTRL3_FCSEL2);
> +	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
>  }
> 
>  /**
> --
> 1.6.6.rc2