[PATCH] ARM: cache-l2x0: add resume entry for l2 in secure mode

[Russell King - ARM Linux]

On Wed, Sep 21, 2011 at 01:53:37PM +0800, Barry Song wrote:
> yes. imx6q actually needs to enable l2 earlier than cpu_resume(and mmu
> resume). so how about letting outer_resume support both phy and virt
> address restore?

You can't call C functions in the kernel before the MMU is enabled.