[PATCH 5/5] ARM: gic: add OF based initialization
grant.likely at secretlab.ca
Tue Sep 20 00:18:04 EDT 2011
On Mon, Sep 19, 2011 at 04:53:39PM -0500, Rob Herring wrote:
> On 09/19/2011 04:14 PM, Grant Likely wrote:
> > (Alternately, if there is no need for a CPU mask because PPI
> > interrupts will never be wired to more than one CPU, then it would be
> > better to encode the CPU number into the second cell with the SPI
> > number).
> You meant PPI number, right? ^^^
Yes, I meant PPI number. I keep transposing the two; I don't know why.
> The common case at least on the A9 is a PPI is routed to all cores. QC
> is different though. This was discussed previously. Basically, anything
> is possible here, so the mask is needed for sure.
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