[PATCH 13/25] OMAP4: PM: Add WakeupGen module as OMAP gic_arch_extn
Santosh
santosh.shilimkar at ti.com
Wed Sep 14 22:57:48 EDT 2011
On Thursday 15 September 2011 12:34 AM, Tony Lindgren wrote:
> * Santosh <santosh.shilimkar at ti.com> [110914 09:49]:
>> On Wednesday 14 September 2011 10:48 PM, Tony Lindgren wrote:
>>> * Santosh<santosh.shilimkar at ti.com> [110914 09:40]:
>>>> On Wednesday 14 September 2011 10:38 PM, Tony Lindgren wrote:
>>>>> * Santosh<santosh.shilimkar at ti.com> [110914 09:16]:
>>>>>
>>>>> Thanks for the clarification. It seems to me the spec is most likely
>>>>> wrong as we've had the GIC working for over two years now without
>>>>> doing anything with the wakeup gen registers :)
>>>>>
>>>> It's working because CPU clockdomain are never put under HW
>>>> supervised mode and they are kept in force wakeup. Clock-domain
>>>> never idles on mainline code. PM series will put the clock-domains
>>>> under HW supervison as needed to achieve any low power states and
>>>> then all sorts of corner cases will come out.
>>>
>>> But again the wakeup gen triggers only do something when hitting
>>> idle. There should be no use for them during runtime, right?
>>>
>> You missed my point in the description. Clockdomain inactive
>> doesn't depend on idle or WFI execution. Under HW supervison
>> CPU clock domain can get into inactive when CPU is stalled and
>> waiting for a read response from slow interconnect.
>
> Ah OK. If it's needed during runtime too then that explains why
> the registers need to be kept in sync.
>
>> One thing for sure. Designers has chosen a wrong name to this
>> IP. Wakeugen apears like needed only for low power wakeup which
>> not seems to be entirely correct as per specs
>
> Yes it's not obvious reading the TRM either. Maybe add some
> comment about that to the patch?
>
You are right. Documentation isn't clear about this. Will
add the above point in change log.
btw, thanks for the good discussion on this topic.
Regards
Santosh
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