[PATCH 2/3] ARM: at91/gpio: add irqdomain to gpio interrupts

Nicolas Ferre nicolas.ferre at atmel.com
Thu Nov 24 16:56:28 EST 2011


Signed-off-by: Nicolas Ferre <nicolas.ferre at atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/arm/mach-at91/gpio.c |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 74d6783..45a39d0 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -20,6 +20,7 @@
 #include <linux/list.h>
 #include <linux/module.h>
 #include <linux/io.h>
+#include <linux/irqdomain.h>
 
 #include <mach/hardware.h>
 #include <mach/at91_pio.h>
@@ -32,6 +33,7 @@ struct at91_gpio_chip {
 	int			id;		/* ID of register bank */
 	void __iomem		*regbase;	/* Base of register bank */
 	struct clk		*clock;		/* associated clock */
+	struct irq_domain	domain;		/* associated irq domain */
 };
 
 #define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
@@ -483,6 +485,20 @@ postcore_initcall(at91_gpio_debugfs_init);
 /*--------------------------------------------------------------------------*/
 
 /*
+ * irqdomain initialization: pile up irqdomains on top of AIC range
+ */
+static void __init at91_gpio_irqdomain(struct at91_gpio_chip *at91_gpio)
+{
+	struct irq_domain	*gpio_irq_d = &at91_gpio->domain;
+
+	gpio_irq_d->irq_base =
+		gpio_irq_d->hwirq_base = gpio_to_irq(at91_gpio->chip.base);
+	gpio_irq_d->nr_irq = at91_gpio->chip.ngpio;
+	gpio_irq_d->ops = &irq_domain_simple_ops;
+	irq_domain_add(gpio_irq_d);
+}
+
+/*
  * This lock class tells lockdep that GPIO irqs are in a different
  * category than their parents, so it won't report false recursion.
  */
@@ -517,6 +533,9 @@ void __init at91_gpio_irq_setup(void)
 			set_irq_flags(irq, IRQF_VALID);
 		}
 
+		/* setup irq domain for this GPIO controller */
+		at91_gpio_irqdomain(this);
+
 		/* The toplevel handler handles one bank of GPIOs, except
 		 * AT91SAM9263_ID_PIOCDE handles three... PIOC is first in
 		 * the list, so we only set up that handler.
-- 
1.7.5.4




More information about the linux-arm-kernel mailing list