[PATCH 1/4] ARM: exynos4: Add support for AFTR mode cpuidle state

[Amit Kachhap]

On 11 November 2011 13:03, MyungJoo Ham <myungjoo.ham at gmail.com> wrote:
> On Sat, Nov 5, 2011 at 2:03 AM,  <amit.kachhap at linaro.org> wrote:
>> From: Amit Daniel Kachhap <amit.kachhap at linaro.org>
>>
>> This patch adds support for AFTR(ARM OFF TOP RUNNING) mode in
>> cpuidle driver for EXYNOS4210. L2 cache keeps their data in this mode.
>> This patch ports the code to the latest interfaces to
>> save/restore CPU state inclusive of CPU PM notifiers, l2
>> resume and cpu_suspend/resume.
>>
>> Signed-off-by: Jaecheol Lee <jc.lee at samsung.com>
>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi at arm.com>
>> Signed-off-by: Amit Daniel Kachhap <amit.kachhap at linaro.org>
>> ---
> []
>> +#define REG_DIRECTGO_ADDR      (samsung_rev() == EXYNOS4210_REV_1_1 ? \
>> +                               S5P_INFORM7 : (S5P_VA_SYSRAM + 0x24))
>> +#define REG_DIRECTGO_FLAG      (samsung_rev() == EXYNOS4210_REV_1_1 ? \
>> +                               S5P_INFORM6 : (S5P_VA_SYSRAM + 0x20))
>>
> []
>> +
>> +       __raw_writel(BSYM(virt_to_phys(s3c_cpu_resume)),
>> +                                                REG_DIRECTGO_ADDR);
>> +       __raw_writel(0xfcba0d10, REG_DIRECTGO_FLAG);
>> +
>>        return 0;
>
> Hello,
>
>
> Why are you using INFORM6 and 7 registers in order to save resume
> address and power-mode flags?
>
> INFORM0 and 1 have been used in pm.c for the exactly same purpose.
> Please use the same registers in cpuidle.c as well.
>
> The same part in bootloader (IPL) can handle whether it's
> suspend-to-RAM or AFTR and the both modes are mutually exclusive and
> you only need one value for resume PC.
>
> Therefore, you can keep the value at the same location, which is the
> method we have been using.
Hi,

I tried using INFORM0 and INFORM1 in cpuidle and make it same as pm.c.
But this doesnt work. Looks like my irom fused code checks for the
wakeup source and needs INFORM7 and INFORM6 for non sleep wakeups. My
cpu version is S5PV310AH--0AH1113(Origen board).
I suggest adding support for both type of wakeups(directly from irom
and through bootloader).

Thanks,
Amit D
>
> Besides, the Exynos4210 chipmaker (S.LSI) has told that INFORM6 and 7
> registers are used by in-chip code (iROM or iRAM).
>
>
> Cheers!
> MyungJoo
>
>
>
> --
> MyungJoo Ham, Ph.D.
> Mobile Software Platform Lab, DMC Business, Samsung Electronics
>