[PATCH V4 07/14] ARM: EXYNOS4: Use generic DMA PL330 driver
Boojin Kim
boojin.kim at samsung.com
Mon Jul 25 08:59:33 EDT 2011
Jassi Brar Wrote:
> Sent: Monday, July 25, 2011 9:00 PM
> To: Boojin Kim
> Cc: linux-arm-kernel at lists.infradead.org; linux-samsung-
> soc at vger.kernel.org; Vinod Koul; Dan Williams; Kukjin Kim; Grant
> Likely; Mark Brown
> Subject: Re: [PATCH V4 07/14] ARM: EXYNOS4: Use generic DMA PL330
> driver
>
> On Mon, Jul 25, 2011 at 6:58 AM, Boojin Kim <boojin.kim at samsung.com>
> wrote:
>
> > diff --git a/arch/arm/mach-exynos4/dma.c b/arch/arm/mach-
> exynos4/dma.c
> > index 564bb53..e1c00cf 100644
> > --- a/arch/arm/mach-exynos4/dma.c
> > +++ b/arch/arm/mach-exynos4/dma.c
> > @@ -21,151 +21,250 @@
> > * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> > */
> >
> > -#include <linux/platform_device.h>
> > #include <linux/dma-mapping.h>
> > +#include <linux/amba/bus.h>
> > +#include <linux/amba/pl330.h>
> >
> > +#include <asm/irq.h>
> > #include <plat/devs.h>
> > #include <plat/irqs.h>
> >
> > #include <mach/map.h>
> > #include <mach/irqs.h>
> > -
> > -#include <plat/s3c-pl330-pdata.h>
> > +#include <mach/dma.h>
> >
> > static u64 dma_dmamask = DMA_BIT_MASK(32);
> >
> > -static struct resource exynos4_pdma0_resource[] = {
> > - [0] = {
> > - .start = EXYNOS4_PA_PDMA0,
> > - .end = EXYNOS4_PA_PDMA0 + SZ_4K,
> > - .flags = IORESOURCE_MEM,
> > - },
> > - [1] = {
> > - .start = IRQ_PDMA0,
> > - .end = IRQ_PDMA0,
> > - .flags = IORESOURCE_IRQ,
> > +struct dma_pl330_peri pdma0_peri[32] = {
> Please remove 32 from the list (it seems you don't always pass 32
> elements)
> Also for completeness, please explicitly write element indices below
> because
> it's not some array of randomly placed elements.
> Same for every other such occurance.
I will address your comment.
>
> > + {
> > + .peri_id = (u8)DMACH_PCM0_RX,
> > + .rqtype = DEVTOMEM,
> > + }, {
> > + .peri_id = (u8)DMACH_PCM0_TX,
> > + .rqtype = MEMTODEV,
> > + }, {
> > + .peri_id = (u8)DMACH_PCM2_RX,
> > + .rqtype = DEVTOMEM,
> > + }, {
> > + .peri_id = (u8)DMACH_PCM2_TX,
> > + .rqtype = MEMTODEV,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_MSM_REQ0,
> > + }, {
> > + .peri_id = (u8)DMACH_MSM_REQ2,
> > + }, {
> > + .peri_id = (u8)DMACH_SPI0_RX,
> > + .rqtype = DEVTOMEM,
> > + .burst_sz = 1,
> > + }, {
> > + .peri_id = (u8)DMACH_SPI0_TX,
> > + .rqtype = MEMTODEV,
> > + .burst_sz = 1,
> > + }, {
> > + .peri_id = (u8)DMACH_SPI2_RX,
> > + .rqtype = DEVTOMEM,
> > + .burst_sz = 1,
> > + }, {
> > + .peri_id = (u8)DMACH_SPI2_TX,
> > + .rqtype = MEMTODEV,
> > + .burst_sz = 1,
> > + }, {
> > + .peri_id = (u8)DMACH_I2S0S_TX,
> > + .rqtype = MEMTODEV,
> > + }, {
> > + .peri_id = (u8)DMACH_I2S0_RX,
> > + .rqtype = DEVTOMEM,
> > + }, {
> > + .peri_id = (u8)DMACH_I2S0_TX,
> > + .rqtype = MEMTODEV,
> > + }, {
> > + .peri_id = (u8)DMACH_UART0_RX,
> > + .rqtype = DEVTOMEM,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_UART0_TX,
> > + .rqtype = MEMTODEV,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_UART2_RX,
> > + .rqtype = DEVTOMEM,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_UART2_TX,
> > + .rqtype = MEMTODEV,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_UART4_RX,
> > + .rqtype = DEVTOMEM,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_UART4_TX,
> > + .rqtype = MEMTODEV,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_SLIMBUS0_RX,
> > + .rqtype = DEVTOMEM,
> > + }, {
> > + .peri_id = (u8)DMACH_SLIMBUS0_TX,
> > + .rqtype = MEMTODEV,
> > + }, {
> > + .peri_id = (u8)DMACH_SLIMBUS2_RX,
> > + .rqtype = DEVTOMEM,
> > + }, {
> > + .peri_id = (u8)DMACH_SLIMBUS2_TX,
> > + .rqtype = MEMTODEV,
> > + }, {
> > + .peri_id = (u8)DMACH_SLIMBUS4_RX,
> > + .rqtype = DEVTOMEM,
> > + }, {
> > + .peri_id = (u8)DMACH_SLIMBUS4_TX,
> > + .rqtype = MEMTODEV,
> > + }, {
> > + .peri_id = (u8)DMACH_AC97_MICIN,
> > + .rqtype = DEVTOMEM,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_AC97_PCMIN,
> > + .rqtype = DEVTOMEM,
> > + .burst_sz = 4,
> > + }, {
> > + .peri_id = (u8)DMACH_AC97_PCMOUT,
> > + .rqtype = MEMTODEV,
> > + .burst_sz = 4,
> > },
> > };
>
>
> >
> > -static struct s3c_pl330_platdata exynos4_pdma0_pdata = {
> > - .peri = {
> > - [0] = DMACH_PCM0_RX,
> > - [1] = DMACH_PCM0_TX,
> > - [2] = DMACH_PCM2_RX,
> > - [3] = DMACH_PCM2_TX,
> > - [4] = DMACH_MSM_REQ0,
> > - [5] = DMACH_MSM_REQ2,
> > - [6] = DMACH_SPI0_RX,
> > - [7] = DMACH_SPI0_TX,
> > - [8] = DMACH_SPI2_RX,
> > - [9] = DMACH_SPI2_TX,
> > - [10] = DMACH_I2S0S_TX,
> > - [11] = DMACH_I2S0_RX,
> > - [12] = DMACH_I2S0_TX,
> > - [13] = DMACH_I2S2_RX,
> > - [14] = DMACH_I2S2_TX,
> > - [15] = DMACH_UART0_RX,
> > - [16] = DMACH_UART0_TX,
> > - [17] = DMACH_UART2_RX,
> > - [18] = DMACH_UART2_TX,
> > - [19] = DMACH_UART4_RX,
> > - [20] = DMACH_UART4_TX,
> > - [21] = DMACH_SLIMBUS0_RX,
> > - [22] = DMACH_SLIMBUS0_TX,
> > - [23] = DMACH_SLIMBUS2_RX,
> > - [24] = DMACH_SLIMBUS2_TX,
> > - [25] = DMACH_SLIMBUS4_RX,
> > - [26] = DMACH_SLIMBUS4_TX,
> > - [27] = DMACH_AC97_MICIN,
> > - [28] = DMACH_AC97_PCMIN,
> > - [29] = DMACH_AC97_PCMOUT,
> > - [30] = DMACH_MAX,
> > - [31] = DMACH_MAX,
> > - },
> > +struct dma_pl330_platdata exynos4_pdma0_pdata = {
> > + .nr_valid_peri = 32,
> Perhaps, this is why you had to add the NULL peri check.
> Please use ARRAY_SIZE here.
> Same for every other such occurance.
I will address your comment.
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