[PATCH] ARM: cns3xxx: Add support for L2 Cache Controller
Imre Kaloz
kaloz at openwrt.org
Thu Jul 7 03:36:05 EDT 2011
On Thu, 07 Jul 2011 01:57:11 +0200, Lin Mac <mkl0301 at gmail.com> wrote:
> CNS3xxx have PL310. Would you mind to enable CONFIG_CACHE_PL310 by
> default as well? It is default disabled by !CPU_V6 of CACHE_PL310.
>
> @@ -795,6 +795,7 @@ config CACHE_L2X0
> default y
> select OUTER_CACHE
> select OUTER_CACHE_SYNC
> + select CACHE_PL310 if ARCH_CNS3XXX
> help
> This option enables the L2x0 PrimeCell.
Correct me if I'm wrong, but isn't cns3xxx V6K? So.....
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -322,7 +322,7 @@ config ARCH_CLPS711X
config ARCH_CNS3XXX
bool "Cavium Networks CNS3XXX family"
- select CPU_V6
+ select CPU_V6K
select GENERIC_CLOCKEVENTS
select ARM_GIC
select MIGHT_HAVE_PCI
Imre
More information about the linux-arm-kernel
mailing list