AT91: Fix power-saving in idle-mode on 926T processors
u.kleine-koenig at pengutronix.de
Mon Jan 10 14:23:42 EST 2011
On Mon, Jan 10, 2011 at 04:43:07PM +0100, Peter Korsgaard wrote:
> >>>>> "Anders" == Anders Larsen <al at alarsen.net> writes:
> >> Is there a known interaction with this and the JTAG controller?
> Anders> indeed there is - disabling the processor clock blocks JTAG debugging.
> Ok - And apparently it completely blocks the JTAG controller, so you
> cannot even put it in bypass mode and access other devices on the same
> JTAG chain.
This is a quite usual violation of ieee-1949.1-2001 (i.e. the jtag
standard (don't know if there is a newer version?)). I really wonder
why it's so hard to get this right. There is the availability of
"compiliance-enable patterns" that allow to say: "My device is only
jtaggable if this input is 1." Why not power the jtag block with such an
input? Software doesn't need (and actually must not) have the ability
to disable the jtag clock. Moreover this way the chip doesn't need any
current to keep jtag on and still a developer needing jtag doesn't need
to change any source code, but only needs a jumper on his devboard.
It could be so easy when all people knew what they do.
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