AT91: Fix power-saving in idle-mode on 926T processors

[Peter Korsgaard]

>>>>> "Anders" == Anders Larsen <al at alarsen.net> writes:

Hi,

 >> Is there a known interaction with this and the JTAG controller?

 Anders> indeed there is - disabling the processor clock blocks JTAG debugging.

Ok - And apparently it completely blocks the JTAG controller, so you
cannot even put it in bypass mode and access other devices on the same
JTAG chain.

 >> I haven't had time to look closer into it yet, but with this applied
 >> I can no longer access an Altera FPGA on a chain shared with a 9G45
 >> through Quartus.

 Anders> If you boot with the kernel parameter "nohlt", arch_idle() is
 Anders> not called, and JTAG should work again (but of course power
 Anders> consumption will be substantially higher).

 Anders> This was noted by Uwe Kleine-König in
 Anders> https://lkml.org/lkml/2010/5/5/342

Thanks.

-- 
Bye, Peter Korsgaard