[PATCH 6/6] ARM: nmk: update GPIO chained IRQ handler to use EOI in parent chip

[Russell King - ARM Linux]

On Mon, Feb 28, 2011 at 08:16:25PM +0100, Thomas Gleixner wrote:
> So what's the gain of a barebone chained handler over a regular
> interrupt:
> 
>  - 100 instructions less
>  - lack of statistics

We don't want statistics.  Don't care how many times we go to look
at the interrupt controller - and actually it's really wrong to count
them in the first place.  Counting them means that you double-count
these interrupt events, and the more layers of interrupt controllers
there are the worse that problem gets.

So no, that's a definite argument *for* chained handers.

>  - lack of affinity setting via standard interfaces

Don't want affinity for them, as setting their affinity means that
you then end up forcing the affinity for the sub-interrupts too.
How you do cope with the high-level interrupt having affinity to
CPU0 but a lower level interrupt being affine to CPU1 only?

It's non-sensible, and is broken.  So no, again this isn't an
argument for not using chained handlers.  It's an argument *for*
them.

Sorry, but I think this stuff is right, and chained handlers like
these have their place.