[PATCH] ARM: gic: use handle_fasteoi_irq for SPIs

[Colin Cross]

On Fri, Feb 18, 2011 at 4:09 AM, Will Deacon <will.deacon at arm.com> wrote:
>> > I don't think the cascaded handlers would have assumed that because ack
>> > just sends EOI - it doesn't do any masking. We do have a problem with
>> > the percpu_irq flow though (the GIC reference manual says that EOIing a
>> > non-active interrupt is UNPREDICTABLE).
>> >
>> > Another easy hack is to set IRQ_PER_CPU in the irq_desc->status for PPI
>> > interrupts and then check this in the ack routine. It's pretty ugly, but
>> > it doesn't affect the common case and it at least postpones the platform
>> > changes.
>>
>> Conditionals in irq_chip callbacks are almost always a sign of
>> doom. Don't do that.
>
> Ok, that was a hack too far! Let's fix this properly.
>
>> How many chained handlers need to be fixed, when the whole gic stuff
>> switches to eoi ?
>
> Well, grepping for set_chained_irq_handler yields a whole bunch of platforms
> but the set of these which appear to use the gic is only:
>
> mach-msm
> mach-s5pv310
> mach-shmobile
> mach-tegra
>
> I'll have a look through the code there and post some patches next week.
> Hopefully if I've missed anybody, they'll shout then.

omap4 uses the gic, and uses chained handlers in plat-omap/gpio.c.
plat-omap/gpio.c seems to handle similar gpio hardware connected to
different IRQ controllers on different SoCs - non-gic on omap2-3, and
gic on omap4.