[PATCH] ARM: errata: pl310 cache sync operation may be faulty
catalin.marinas at arm.com
Tue Feb 15 11:38:52 EST 2011
On 15 February 2011 11:18, srinidhi kasagar
<srinidhi.kasagar at stericsson.com> wrote:
> +config ARM_ERRATA_753970
> + bool "ARM errata: cache sync operation may be faulty"
> + depends on CACHE_PL310
> + help
> + This option enables the workaround for the 753970 PL310 erratum.
Is this number correct? I couldn't find it in ARM's internal database.
> + Under some condition the effect of cache sync operation on
> + the store buffer still remains when the operation completes.
> + This means that the store buffer is always asked to drain and
> + this prevents it from merging any further writes. The workaround
> + is to replace the normal offset of cache sync operation (0x730)
> + by another offset targeting an unmapped PL310 register 0x740.
> + This has the same effect as the cache sync operation: store buffer
> + drain and waiting for all buffers empty.
You may want to specify the revision number this applies to so that
people to enable it if not needed.
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