[PATCH 00/14] Fix issues with ARMv6+v6k+v7 kernels
Catalin Marinas
catalin.marinas at arm.com
Thu Feb 10 08:12:35 EST 2011
On Thu, 2011-02-10 at 13:04 +0000, Russell King - ARM Linux wrote:
> On Wed, Feb 09, 2011 at 10:01:33AM +0000, Catalin Marinas wrote:
> > Could we make the domains usage a run-time feature based on the
> > architecture version? For ARMv7, we need to have the vectors page
> > read-only anyway if the SWP emulation is enabled (and I posted a
> > simple patch in a reply to your email).
> >
> > The issue I see is that ARM11MPCore is reported as v7 though we still
> > use domains on this processor (we could always remove the domains if
> > TLS register is available or use some more precise architecture
> > version identification).
>
> We could also do the below, which I think is more logical - SWP emulation
> requires that CPU domains aren't enabled, so let's make that explicit
> in the Kconfig.
This may work but it is to restrictive IMHO. SWP emulation only requires
that RO user pages are also RO for the kernel. And there is a simple fix
for this:
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index ee57640..6e0b349 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -758,17 +758,21 @@ static void __init kuser_get_tls_init(unsigned long vectors)
void __init early_trap_init(void)
{
-#if defined(CONFIG_CPU_USE_DOMAINS)
- unsigned long vectors = CONFIG_VECTORS_BASE;
-#else
- unsigned long vectors = (unsigned long)vectors_page;
-#endif
+ unsigned long vectors;
extern char __stubs_start[], __stubs_end[];
extern char __vectors_start[], __vectors_end[];
extern char __kuser_helper_start[], __kuser_helper_end[];
int kuser_sz = __kuser_helper_end - __kuser_helper_start;
/*
+ * On ARMv7, user RO pages are mapped as kernel RO.
+ */
+ if (cpu_architecture() >= 7)
+ vectors = (unsigned long)vectors_page;
+ else
+ vectors = CONFIG_VECTORS_BASE;
+
+ /*
* Copy the vectors, stubs and kuser helpers (in entry-armv.S)
* into the vector page, mapped at 0xffff0000, and ensure these
* are visible to the instruction stream.
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0c1172b..5f51592 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -146,11 +146,6 @@ ENTRY(cpu_v7_set_pte_ext)
tst r1, #L_PTE_USER
orrne r3, r3, #PTE_EXT_AP1
-#ifdef CONFIG_CPU_USE_DOMAINS
- @ allow kernel read/write access to read-only user pages
- tstne r3, #PTE_EXT_APX
- bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
-#endif
tst r1, #L_PTE_XN
orrne r3, r3, #PTE_EXT_XN
--
Catalin
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