[PATCH 3/4] ARM: Xilinx: Adding timer support to the platform

[Russell King - ARM Linux]

On Sat, Feb 05, 2011 at 09:08:43AM -0700, John Linn wrote:
> +/*
> + * Definitions of the timer read/write macro
> + */
> +#define xttcpss_read(addr)	__raw_readl((void __iomem *)addr)
> +#define xttcpss_write(addr, val) __raw_writel(val, (void __iomem *)(addr))

Get rid of these casts.  You should never need to cast to void __iomem *.

> +
> +
> +/**
> + * struct xttcpss_timer - This definition defines local timer structure
> + *
> + * @name:	Name of Timer
> + * @base_addr:	Base address of timer
> + * @timer_irq:	irqaction structure for the timer device
> + * @mode:       only valid for an clock event, periodic or one-shot
> + **/
> +struct xttcpss_timer {
> +	char *name;
> +	unsigned long base_addr;

Replace this with void __iomem *base_addr.

> +		timer->base_addr = XTTCPSS_TIMER_BASE + (4*timer_id);

Right, so XTTCPSS_TIMER_BASE should be typed as void __iomem *.

> +#define XTTCPSS_TIMER_BASE	TTC0_BASE

which means TTC0_BASE should be void __iomem * as well as this is an
iomem cookie, not a physical address.