[PATCH] [RFC] pinctrl: add a driver for Energy Micro's efm32 SoCs

Stephen Warren swarren at nvidia.com
Fri Dec 9 19:14:14 EST 2011


Tony Lindgren wrote at Friday, December 09, 2011 10:53 AM:
> * Tony Lindgren <tony at atomide.com> [111209 08:53]:
...
> > For letting a device do it's pingroup in DT, I've played with the
> > following:
> >
> > 	/*      mux func phandle mux func name    hw initial flags */
> > 	pins = <&uart3_rx_irrx>, "uart3_rx_irrx", <0xdeadbeef>,
> > 		<&uart3_tx_irtx>, "uart3_tx_irtx", <0xdeadbeef>;
> >
> > But it seems that doing mixed-property arrays gets nasty as any
...
> > So I've pretty much come to the conclusion that we would have to
> > use something like this instead:
> >
> > 	/*      phandle        f hw specific initial flags */
> > 	pins = <&uart3_rx_irrx 0 0xdeadbeef
> > 		&uart3_tx_irtx 0 0xdeadbeef>;
> >
> > This however has a problem for cases where we may not have a phandle
> > in DT for the mux function. For example, let's assume that we'll have
> > tens of thousands of lines of mux data for omaps (we already have
> > over 6k LOC) and just want to load that from /lib/firmware to avoid
> > bloating the kernel. In that case we won't have the phandle for the
> > mux function in DT.
...
> Oh forgot to mention of course what Benoit came up which is reg-names.
> That of course is doable with both phandles and pin names:
> 
> So optionally either
> 
> 	pins = <&uart3_rx_irrx &uart3_tx_irtx>;
> or
> 
> 	pin-names = "uart3_rx_irrx",  "uart3_tx_irtx";

Tony,

It sounds like you've already started working on some DT bindings for
pin muxing. Are you just at the thinking stage as above, or do you have
any concrete code? I'd obviously be interested in looking at any early
bindings to see if I can port the Tegra pinctrl driver to use them.

Thanks.

-- 
nvpublic




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