[PATCH] [RFC] pinctrl: add a driver for Energy Micro's efm32 SoCs
u.kleine-koenig at pengutronix.de
Fri Dec 9 09:15:12 EST 2011
On Fri, Dec 09, 2011 at 01:55:16PM +0000, Arnd Bergmann wrote:
> On Friday 09 December 2011, Uwe Kleine-König wrote:
> > On Thu, Dec 08, 2011 at 11:55:53PM +0100, Arnd Bergmann wrote:
> > > On Thursday 08 December 2011 23:40:57 Uwe Kleine-König wrote:
> > > > Signed-off-by: Uwe Kleine-König <u.kleine-koenig at pengutronix.de>
> > > > ---
> > > > Note that there is no support yet for efm32 in mainline, so ARCH_EFM32
> > > > isn't defined.
> > >
> > > Since the platform is not yet part of the architecture, it will have
> > > to use device tree based probing when it gets added. I would suggest
> > > only merging drivers for it that can deal with this and do not rely
> > > on platform_data.
> > I feared you will say that. These machines have at most 4MiB of RAM.
> > I'll have to evaluate if dt is too heavy for them.
> What's the state of the platform code? Is this based on Catalin's
> Cortex-M3 tree? I've heard a few people express interest in getting
> various M3 based SoCs supported mainline and I think that would
> be a good idea, but I would also expect that device tree is one
> of the lesser problems here.
Yes, I took a few patches from there and rebased them to 3.2-rc3. The
patches I have from Catalin are:
131dbba Cortex-M3: Add base support for Cortex-M3
48cc6a8 Cortex-M3: Add support for exception handling
2aebf66 Cortex-M3: Add NVIC support
75bf249 Cortex-M3: Allow the building of Cortex-M3 kernel port
66dcc1e Cortex-M3: Add VFP support
a541241 [ARM] Do not call flush_cache_user_range with mmap_sem held
6083ea7 ARM: Handle instruction cache maintenance fault properly
I didn't look into these deeply yet to check how ready they are for
mainline, but my machine boots to a prompt (which doesn't allow to start
anything because it doesn't have enough memory to allocate the stack for
a new program. I will soon get a machine that has 4MiB of RAM instead of
the 1MiB I have now).
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