[PATCH] arm,davinci: configure davinci aemif chipselects through OF
nsekhar at ti.com
Thu Dec 8 05:29:14 EST 2011
On Thu, Dec 08, 2011 at 14:36:47, Heiko Schocher wrote:
> >>>> diff --git a/arch/arm/mach-davinci/aemif.c b/arch/arm/mach-davinci/aemif.c
> >>>> index 1ce70a9..12c559f 100644
> >>>> --- a/arch/arm/mach-davinci/aemif.c
> >>>> +++ b/arch/arm/mach-davinci/aemif.c
> >>>> @@ -13,12 +13,14 @@
> >>>> #include <linux/err.h>
> >>>> #include <linux/clk.h>
> >>>> #include <linux/module.h>
> >>>> +#include <linux/of.h>
> >>>> +#include <linux/of_address.h>
> >>>> #include <linux/time.h>
> >>>> #include <mach/aemif.h>
> >>>> /* Timing value configuration */
> >>>> -
> >>>> +#define ASIZE(x) (x)
> >>>> #define TA(x) ((x) << 2)
> >>>> #define RHOLD(x) ((x) << 4)
> >>>> #define RSTROBE(x) ((x) << 7)
> >>>> @@ -26,7 +28,10 @@
> >>>> #define WHOLD(x) ((x) << 17)
> >>>> #define WSTROBE(x) ((x) << 20)
> >>>> #define WSETUP(x) ((x) << 26)
> >>>> +#define EW(x) ((x) << 30)
> >>>> +#define SS(x) ((x) << 31)
> >>> You are adding support for additional configuration
> >>> parameters which should be done in a separate patch.
> >> Hmm.. they are only used in the OF case ... is this split
> >> really needed?
> > But they should also be useful in the non-OF case, no?
> > Why restrict their usage to the OF case?
> I thought there is no need, because nobody needed this yet ...
> Ok, I change this too, so I have to fix this files:
True, no one configured these so far (relied on the defaults).
Also, they probably did not get added into the timing API since
they are not really timing parameters. Its better to add a separate
configuration API for these.
It will be better to move the driver outside of arch/arm/
before adding new features. I don't know if there is a place
defined yet for "memory interface" drivers, so, drivers/misc/
may be the place.
I have added Greg and Arnd for their opinion in this.
DaVinci AEMIF is an async memory interface peripheral implemented
in arch/arm/mach-davinci/aemif.c. It helps interface to NAND, NOR
and other asynchronous memories. Currently it just provides an API
for timing value configuration. The API is invoked by the MTD NAND
Specification here: http://www.ti.com/lit/ug/sprue20c/sprue20c.pdf
We are looking at a place for this outside of architecture code.
> $ grep -lr davinci_aemif_timing .
> I do not know the values for this boards for the new parameters.
> How to proceed? Do you know this values? Or is it Ok, if I add in
If we add a new API, there won't be a need to touch existing
> a "#define AEMIF_VALUE_NOT USED 0xff" and if the new value is set to
> this I don't change this setting in the register?
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