[PATCH] mmci: sync DATAEND irq with dma transfer done
ulf.hansson at stericsson.com
Fri Apr 29 08:44:59 EDT 2011
> That's rather unfortunate, because it means that trying it on ARM
> hardware is going to hang indefinitely waiting for the nonexistent
> DMA stuff to finish.
I see the problem, we need a way of being able to switch between using
the dma callback and not using it. I think the variant data should be
used for this, what do you think?
> I remain unconvinced whether this problem applies only to ARMs
> evaluation boards as I believe the whole primecell DMA stuff from
> the outset is fundamentally misdesigned. I suspect there maybe SoCs
> out there which suffer from the same broken DMA issues which ARMs
> eval boards do.
> Maybe an alternative solution is on data end to set a timer, which
> is cancelled when the DMA engine callback arrives. If the timer
> expires, it means we have broken DMA and that needs to be shutdown
> for that instance.
This could be a very good alternative for error handling of the DMA job.
I will try to add some code that handles this.
> However, one thing worries me - what if the DMA callback comes before
> we get the data end interrupt. Given the weirdnesses of your
> implementation found so far (which are well beyond what's visible
> on ARMs own implementation) I wouldn't put any guarantees on the
> relative ordering of that either.
host->dataend and host->size==0 controls whether the data transfer has
finished successfully. I believe this should be handled correctly in my
patch. Maybe it is possible to make some minor restructuring to make it
more clear what the end condition really is, I can see if I can figure
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