Regarding hw irq to Linux irq mapping on ARM

Mark Brown broonie at opensource.wolfsonmicro.com
Wed Sep 22 06:51:11 EDT 2010


On Wed, Sep 22, 2010 at 12:08:17AM -0300, Grant Likely wrote:
> On Tue, Sep 21, 2010 at 6:45 PM, Thomas Gleixner <tglx at linutronix.de> wrote:

> > Add all the I2C, SPI based irq extenders to that list. They seem to
> > pop up all over the place in rapid speed even in x86. We are happy
> > citizens of the embedded horror^Wuniverse now.

> *shudder*

> What's the irq handling latency on those?  Glad I haven't had to deal
> with any of them yet.

Milisecondish, but depends on bus congestion and bus type.  You need to
schedule a thread which then does one but typically more register I/O
operations on the device (read one or more IRQ status registers, and
typically write back to acknowledge the interrupts as well).  These tend
for obvious reasons to be for low volume interrupts like jack detection.



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