[PATCH 1/3] [ARM] tegra: add PCI Express clocks

[Mike Rapoport]

On Thu, Sep 16, 2010 at 11:27 PM, Colin Cross <ccross at google.com> wrote:
> On Thu, Sep 16, 2010 at 9:53 AM, Mike Rapoport <mike at compulab.co.il> wrote:
>> Signed-off-by: Mike Rapoport <mike at compulab.co.il>
>> ---
>>  arch/arm/mach-tegra/tegra2_clocks.c |   76 +++++++++++++++++++++++++++++++++-
>>  1 files changed, 73 insertions(+), 3 deletions(-)
>
> <snip>
>
>> -static int tegra2_pll_clk_wait_for_lock(struct clk *c)
>> +static int tegra2_pll_clk_wait_for_bit_set(struct clk *c, int bit)
>>  {
>>        ktime_t before;
>>
>>        before = ktime_get();
>> -       while (!(clk_readl(c->reg + PLL_BASE) & PLL_BASE_LOCK)) {
>> +       while (!(clk_readl(c->reg + PLL_BASE) & bit)) {
>>                if (ktime_us_delta(ktime_get(), before) > 5000) {
>>                        pr_err("Timed out waiting for lock bit on pll %s",
>>                                c->name);
>> @@ -414,7 +416,7 @@ static int tegra2_pll_clk_enable(struct clk *c)
>>        val |= PLL_MISC_LOCK_ENABLE;
>>        clk_writel(val, c->reg + PLL_MISC(c));
>>
>> -       tegra2_pll_clk_wait_for_lock(c);
>> +       tegra2_pll_clk_wait_for_bit_set(c, PLL_BASE_LOCK);
>>
>>        return 0;
>>  }
>
> I've been told by Nvidia that the pll lock bits are not reliable, and
> will be removing uses of tegra2_pll_clk_wait_for_lock and replacing
> them with delays selected by each pll.  Can you confirm with Nvidia
> that PLLE_MISC_READY works?

I'll try to get a confirmation from NVidia....