[PATCH 1/6] ARM: Add inline function smp_cpu() for early init testing

[Shilimkar, Santosh]

> -----Original Message-----
> From: Will Deacon [mailto:will.deacon at arm.com]
> Sent: Friday, September 03, 2010 5:54 PM
> To: Shilimkar, Santosh; Tony Lindgren; Russell King - ARM Linux
> Cc: linux-omap at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> Bryan Wu
> Subject: RE: [PATCH 1/6] ARM: Add inline function smp_cpu() for early init
> testing
> 
> Santosh,
> 
> > diff --git a/arch/arm/include/asm/smp_plat.h
> b/arch/arm/include/asm/smp_plat.h
> > index 8db3512..82bc488 100644
> > --- a/arch/arm/include/asm/smp_plat.h
> > +++ b/arch/arm/include/asm/smp_plat.h
> > @@ -39,4 +39,11 @@ static inline int cache_ops_need_broadcast(void)
> >  #define UP(instr...)	_str(instr)
> >  #endif
> >
> > +static inline int smp_cpu(void)
> > +{
> > +        u32 mpidr;
> > +        asm volatile("mrc p15, 0, %0, c0, c0, 5" : "=r" (mpidr));
> > +        return (mpidr >> 31) ? !(mpidr >> 30) : 0;
> > +}
> > +
> > Will this be called on UP machines ?? if yes, then mpidr register is not
> > available on those
> 
> The multiprocessor affinity register (MPIDR) is defined as part of ARMv7.
> ARM recommends that it returns 0 on UP systems. If bit 31 is set, then the
> multiprocessing extensions are available.
> 
I might be wrong but  didn't find this register on Cortex-A8(ARMv7).

> The quirk (as discussed early) is that that 11MPCore has the CPUID
> register
> at this location in the coprocessor space, with bit 31 set to 0. This
> means
> that we have to check for it explicitly otherwise we will identify it as a
> UP machine.
> 
> Will
>