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selector, divisor and gates are a single entity or different IP
blocks. It does not matter whether they share registers or not.

The framework can always look at them as separate entities from the
abstraction level.

So if you enable Gate , then the framework goes down the tree and
enables Divisor (which is a NOP) then enables Selector (again a NOP)
and then the current selected Root clock.

So if you set the rate for the gate 1 clock, then the framework can go
down the tree and figure out whether the divisor can be set to that
rate or even figure out that the selector needs to be changed to root
B.

Not lets add more outgoing gates to the divisor:

[Root clock A]-                         |- [ Gate 1 ] - consumer1 (drivers/*)
      	      |                         |
      	      - [Selector] -- [Divisor] -- [ Gate 2 ] - consumer2 (drivers/*)
              |                         |
[Root clock B]-                         |- [ Gate 3 ] - consumer3 (drivers/*)

The enable/disable mechanism will be the same. If you look at rate
changes, then you can decide at the framework level whether it's
possible to change the divisor if there is more than one active child
(Gate). In the above scenario it's not possible as you would violate
the settings of consumer2 and consumer3 if you change the rate on
behalf of consumer1.

[Root clock A]-                         |- [ Gate 1 ] - consumer1 (drivers/*)
      	      |                         |
      	      - [Selector] -- [Divisor] -- [ Gate 2 ] -- [divisor] - consumer2 (drivers/*)
              |                         |
[Root clock B]-                         |- [ Gate 3 ] -- [divisor] - consumer3 (drivers/*)

Now in this scenario the core can figure out whether it can satisfy
the request of consumer1 by adjusting the divisors behind Gate 2 and 3
accordingly.

This are all well defined semantical problems and should be solved in
common code rather than having different buggy implementations in each
SoC clock "framework".

Thanks,

	tglx
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