[PATCH v2] arm: GIC: Do not try to register more then NR_IRQS interrupts

[Pawel Moll]

> > +   gic_irqs = readl(base + GIC_DIST_CTR) & 0x1f;
> > +   gic_irqs = (gic_irqs + 1) * 32;
>
> I think this should still be limited to 1020 IRQs.  Note that 1020 is
> not divisible by 32, so gic_irqs ends up being 1024 which is wrong.

You mean situation when ITLinesNumber=31, I suppose? Well, registers covering 1021-1023 would exist anyway, and I would hope that the relevant bits would be simply ignored, but we may safeguard ourselves anyway.

V3 follows.

Cheers!

Paweł

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