[PATCH 9/9] ARM: pxa: add iwmmx support for PJ4
Nicolas Pitre
nico at fluxnic.net
Wed Nov 17 10:55:41 EST 2010
On Wed, 17 Nov 2010, Haojian Zhuang wrote:
>
>
> >-----Original Message-----
> >From: Haojian Zhuang [mailto:haojian.zhuang at marvell.com]
> >Sent: 2010年11月17日 7:04 PM
> >To: linux-arm-kernel at lists.infradead.org
> >Cc: Haojian Zhuang; Zhou Zhu; Eric Miao; Nicolas Pitre
> >Subject: [PATCH 9/9] ARM: pxa: add iwmmx support for PJ4
> >
> >iwmmxt is used in XScale, XScale3, Mohawk and PJ4 core. But the instructions
> >of accessing CP0 and CP1 is changed in PJ4. Append more files to support
> >iwmmxt in PJ4 core.
> >
> >Signed-off-by: Zhou Zhu <zzhu3 at marvell.com>
> >Signed-off-by: Haojian Zhuang <haojian.zhuang at marvell.com>
> >Cc: Eric Miao <eric.y.miao at gmail.com>
> >Cc: Nicolas Pitre <nico at fluxnic.net>
> >---
> > arch/arm/Kconfig | 4 +-
> > arch/arm/kernel/Makefile | 1 +
> > arch/arm/kernel/iwmmxt.S | 55 +++++++++++++++++++++++++++++++++++-------
> >----
> > 3 files changed, 45 insertions(+), 15 deletions(-)
> >
>
> Changelog:
> 1. Append missing pj4-cp0.c.
OK... some more comments there:
+static int __init pj4_cp0_init(void)
+{
+ u32 cp_access;
+
+ cp_access = pj4_cp_access_read() & ~0xf;
+ pj4_cp_access_write(cp_access | 0xf);
You clear all first 4 bits just to set them all again. Isn't the first
mask redundant?
+ printk(KERN_INFO "XScale iWMMXt coprocessor detected.\n");
You are not really detecting anything here, and this is not for XScale
either. What about ""PJ4 iWMMXt coprocessor enabled.\n" instead?
+ elf_hwcap |= HWCAP_IWMMXT;
+ thread_register_notifier(&iwmmxt_notifier_block);
+
+ pj4_cp_access_write(cp_access);
And here you are clearing access to the coprocessor. There is nothing
that required access to it from the moment it was set at the beginning
of the function, so maybe you should have only cleared it at the
beginning instead.
Nicolas
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