mapping uncached memory

[Budhee Jamaich]

On Wed, Mar 17, 2010 at 10:15 AM, Russell King - ARM Linux
<linux at arm.linux.org.uk> wrote:
> No - if it did, it would contradict the previous sentence.  What it's
> referring to is that on weakly ordered CPUs, you may need barriers.
>

thank you so much.

can you please just give me a hint so i can understand the underlying
mechanism that makes  dma_alloc_coherent work ?
how does the hardware know not to cache access to these addresses ?

again thank you so much