[PATCH] ARM: Improve the L2 cache performance when PL310 is used

[Colin Tuckley]

> -----Original Message-----
> From: Catalin Marinas

> But do they use an L220? Or they don't use anything?

The A8 has it's own L2 cache design, the chip used on the PBA8 has a bit tacked on that makes it look a bit like a 220. I'm also told that it's possible to implement an A8 without a level two cache.

I think this is a case of reading the docs or maybe raising an Arm-support ticket.

Colin

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Colin Tuckley - ARM Ltd.
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