Preload engine in ARMv7 (cortex A8)

[Vinayak Pane]

Hi Reader,

I am planning to utilize the PreLoad Engine for L2 cache. In past, I have
played with cache locking with line by line in ARM9. There I could recall
that tags and indexes are generated on basis of physical address of the
data. Now in case of PLE we have the start address and number of lines to
fill with. Does the PLE operation will leave some indexes empty ? Or does
the PLE populate all the lines in that way with the source data address ? Do
I need to start PLE for the block of size equal to that of way-size ? To
ensure no lines remain empty  and to ensure no line gets overwriten by other
line.

Appreciate your comments.

Thanks
vinayak
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