[RFC PATCH 06/12] arm: msm: set L2CR1 to enable prefetch and burst on Scorpion.
Nicolas Pitre
nico at fluxnic.net
Thu Jan 28 20:06:37 EST 2010
On Thu, 28 Jan 2010, Daniel Walker wrote:
> From: Larry Bassel <lbassel at quicinc.com>
>
> This change improves the following LMBench benchmarks
> by over 15%:
>
> System Call Latency
> Signal Handling Latency
> Fault Latency
> Inter-process Communication Latency
> Inter-process Communication Bandwidth
> Random Number Generation Latency
>
> Acked-by: Steve Muckle <smuckle at quicinc.com>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Shilimkar, Santosh <santosh.shilimkar at ti.com>
> Cc: Nicolas Pitre <nico at fluxnic.net>
> Cc: Bohan, Michael <mbohan at quicinc.com>
> Signed-off-by: Larry Bassel <lbassel at quicinc.com>
> Signed-off-by: Daniel Walker <dwalker at codeaurora.org>
> ---
> arch/arm/mm/proc-v7.S | 5 +++++
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
> index 7aaf88a..3ca5d29 100644
> --- a/arch/arm/mm/proc-v7.S
> +++ b/arch/arm/mm/proc-v7.S
> @@ -2,6 +2,7 @@
> * linux/arch/arm/mm/proc-v7.S
> *
> * Copyright (C) 2001 Deep Blue Solutions Ltd.
> + * Copyright (c) 2009, Code Aurora Forum. All rights reserved.
Do you really think the addition of only 4 lines in a file that contains
348 lines justifies the addition of such copyright notice? What would
the kernel source looks like if everyone adding/modifying 4 lines in
every random files did the same?
Just a thought.
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -242,6 +243,10 @@ __v7_setup:
> mcr p15, 0, r4, c2, c0, 1 @ load TTB1
> mov r10, #0x1f @ domains 0, 1 = manager
> mcr p15, 0, r10, c3, c0, 0 @ load domain access register
> +#ifdef CONFIG_ARCH_MSM_SCORPION
> + mov r0, #0x77
> + mcr p15, 3, r0, c15, c0, 3 @ set L2CR1
> +#endif
> /*
> * Memory region attributes with SCTLR.TRE=1
> *
> --
> 1.6.3.3
>
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