[PATCH 3/3] OMAP4: clocks: Fix the clksel_rate struct DPLL divs
paul at pwsan.com
Wed Jan 13 18:04:34 EST 2010
On Mon, 11 Jan 2010, Rajendra Nayak wrote:
> For all DPLL's the valid dividers are same as the values
> to be programmed in the register. 0 is an invalid value.
> The changes are generated by updating the script which autogenerates
> the file modifed in the patch.
> Signed-off-by: Rajendra Nayak <rnayak at ti.com>
Thanks, queued for 2.6.33-rc (in the for_2.6.33_rc_d branch).
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