[PATCH 1/4] ARM: Change the mandatory barriers implementation

[Russell King - ARM Linux]

On Tue, Feb 23, 2010 at 11:01:05AM +0000, Catalin Marinas wrote:
> -#define mb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
> -#define rmb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
> -#define wmb()	do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
> +#define mb()		dsb()
> +#define rmb()		dmb()
> +#define wmb()		dsb()

What is the reason for getting rid of the arch_is_coherent() bit here
and imposing non-compiler barriers on everything?  I'd assume that
Lennert knew what he was doing with Xscale3.

This also breaks ARMv3 since you now issue a mcr for the write buffer
on architectures which have no write buffer.