[PATCH] ep93xx: Add support for Snapper CL15 module
Ryan Mallon
ryan at bluewatersys.com
Mon Feb 8 15:12:08 EST 2010
H Hartley Sweeten wrote:
> On Sunday, February 07, 2010 1:03 PM, Ryan Mallon wrote:
>
>> H Hartley Sweeten wrote:
>>
>>> On Thursday, February 04, 2010 1:58 PM, Ryan Mallon wrote:
>>>
>>>
>>>> Add support for the Bluewater Systems Snapper CL15 single board computer
>>>> module.
>>>>
>>>> Signed-off-by: Ryan Mallon <ryan at bluewatersys.com>
>>>> Cc: Hartley Sweeten <hartleys at visionengravers.com>
>>>>
>>>>
>>>>
>> Updated version with fixes suggested by Hartley. I haven't rebased on
>> -devel since I think that this should merge cleanly with the Sim.One patch.
>>
>> Signed-off-by: Ryan Mallon <ryan at bluewatersys.com>
>>
>
> Doh... One other thing...
>
> [snip]
>
> +static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
> + unsigned int ctrl)
> +{
> + struct nand_chip *chip = mtd->priv;
> + static int first = 1;
> + unsigned set;
> +
> + if (first) {
> + nand_state = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
> + __raw_writew(nand_state, NAND_CTRL_ADDR(chip));
> + first = 0;
> + }
>
> If I read this correctly, you are making the NAND writeable when
> starting (WPn is high). Is there any way to write-protect the
> device?
>
Yes, that is correct. I have added comments to each of the NAND address
bit defines and removed the unused SNAPPERCL15_NAND_CTRL one. I have
also rewritten the above to assert SNAPPERCL15_NAND_WPN on each write,
which gets rid of the first test. I have tested this and reading/writing
to the device still works. The WPN line does allow the NAND to be made
read-only, but we don't use this feature.
Updated patch below. Can I still use your Acked-by?
Signed-off-by: Ryan Mallon <ryan at bluewatersys.com>
---
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
index 9167c3d..5121ce4 100644
--- a/arch/arm/mach-ep93xx/Kconfig
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -161,6 +161,13 @@ config MACH_MICRO9S
Say 'Y' here if you want your kernel to support the
Contec Micro9-Slim board.
+config MACH_SNAPPER_CL15
+ bool "Support Bluewater Systems Snapper CL15 Module"
+ depends on EP93XX_SDCE0_PHYS_OFFSET
+ help
+ Say 'Y' here if you want your kernel to support the Bluewater
+ Systems Snapper CL15 Module.
+
config MACH_TS72XX
bool "Support Technologic Systems TS-72xx SBC"
depends on EP93XX_SDCE3_SYNC_PHYS_OFFSET
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
index eae6199..556028c 100644
--- a/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_MACH_ADSSPHERE) += adssphere.o
obj-$(CONFIG_MACH_EDB93XX) += edb93xx.o
obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
obj-$(CONFIG_MACH_MICRO9) += micro9.o
+obj-$(CONFIG_MACH_SNAPPER_CL15) += snappercl15.o
obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
diff --git a/arch/arm/mach-ep93xx/snappercl15.c
b/arch/arm/mach-ep93xx/snappercl15.c
new file mode 100644
index 0000000..af9d799
--- /dev/null
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -0,0 +1,176 @@
+/*
+ * arch/arm/mach-ep93xx/snappercl15.c
+ * Bluewater Systems Snapper CL15 system module
+ *
+ * Copyright (C) 2009 Bluewater Systems Ltd
+ * Author: Ryan Mallon <ryan at bluewatersys.com>
+ *
+ * NAND code adapted from driver by:
+ * Andre Renaud <andre at bluewatersys.com>
+ * James R. McKaskill
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ */
+
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/i2c-gpio.h>
+#include <linux/fb.h>
+
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+
+#include <mach/hardware.h>
+#include <mach/fb.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#define SNAPPERCL15_NAND_BASE (EP93XX_CS7_PHYS_BASE + SZ_16M)
+
+#define SNAPPERCL15_NAND_WPN (1 << 8) /* Write protect (active low) */
+#define SNAPPERCL15_NAND_ALE (1 << 9) /* Address latch */
+#define SNAPPERCL15_NAND_CLE (1 << 10) /* Command latch */
+#define SNAPPERCL15_NAND_CEN (1 << 11) /* Chip enable (active low) */
+#define SNAPPERCL15_NAND_RDY (1 << 14) /* Device ready */
+
+#define NAND_CTRL_ADDR(chip) (chip->IO_ADDR_W + 0x40)
+
+static unsigned long nand_state;
+
+static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
+ unsigned int ctrl)
+{
+ struct nand_chip *chip = mtd->priv;
+ unsigned set;
+
+ if (ctrl & NAND_CTRL_CHANGE) {
+ set = SNAPPERCL15_NAND_CEN | SNAPPERCL15_NAND_WPN;
+
+ if (ctrl & NAND_NCE)
+ set &= ~SNAPPERCL15_NAND_CEN;
+ if (ctrl & NAND_CLE)
+ set |= SNAPPERCL15_NAND_CLE;
+ if (ctrl & NAND_ALE)
+ set |= SNAPPERCL15_NAND_ALE;
+
+ nand_state &= ~(SNAPPERCL15_NAND_CEN |
+ SNAPPERCL15_NAND_CLE |
+ SNAPPERCL15_NAND_ALE);
+ nand_state |= set;
+ __raw_writew(nand_state, NAND_CTRL_ADDR(chip));
+ }
+
+ if (cmd != NAND_CMD_NONE)
+ __raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
+}
+
+static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
+{
+ struct nand_chip *chip = mtd->priv;
+
+ return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
+}
+
+static struct mtd_partition snappercl15_nand_partitions[] = {
+ {
+ .name = "Kernel",
+ .offset = 0,
+ .size = SZ_2M,
+ },
+ {
+ .name = "Filesystem",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static void snappercl15_nand_set_parts(uint64_t size,
+ struct platform_nand_chip *chip)
+{
+ chip->partitions = snappercl15_nand_partitions;
+ chip->nr_partitions = ARRAY_SIZE(snappercl15_nand_partitions);
+}
+
+static struct platform_nand_data snappercl15_nand_data = {
+ .chip = {
+ .nr_chips = 1,
+ .set_parts = snappercl15_nand_set_parts,
+ .options = NAND_NO_AUTOINCR,
+ .chip_delay = 25,
+ },
+ .ctrl = {
+ .dev_ready = snappercl15_nand_dev_ready,
+ .cmd_ctrl = snappercl15_nand_cmd_ctrl,
+ },
+};
+
+static struct resource snappercl15_nand_resource[] = {
+ {
+ .start = SNAPPERCL15_NAND_BASE,
+ .end = SNAPPERCL15_NAND_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device snappercl15_nand_device = {
+ .name = "gen_nand",
+ .id = -1,
+ .dev.platform_data = &snappercl15_nand_data,
+ .resource = snappercl15_nand_resource,
+ .num_resources = ARRAY_SIZE(snappercl15_nand_resource),
+};
+
+static struct ep93xx_eth_data snappercl15_eth_data = {
+ .phy_id = 1,
+};
+
+static struct i2c_gpio_platform_data snappercl15_i2c_gpio_data = {
+ .sda_pin = EP93XX_GPIO_LINE_EEDAT,
+ .sda_is_open_drain = 0,
+ .scl_pin = EP93XX_GPIO_LINE_EECLK,
+ .scl_is_open_drain = 0,
+ .udelay = 0,
+ .timeout = 0,
+};
+
+static struct i2c_board_info __initdata snappercl15_i2c_data[] = {
+ {
+ /* Audio codec */
+ I2C_BOARD_INFO("tlv320aic23", 0x1a),
+ },
+};
+
+static struct ep93xxfb_mach_info snappercl15_fb_info = {
+ .num_modes = EP93XXFB_USE_MODEDB,
+ .bpp = 16,
+};
+
+static void __init snappercl15_init_machine(void)
+{
+ ep93xx_init_devices();
+ ep93xx_register_eth(&snappercl15_eth_data, 1);
+ ep93xx_register_i2c(&snappercl15_i2c_gpio_data, snappercl15_i2c_data,
+ ARRAY_SIZE(snappercl15_i2c_data));
+ ep93xx_register_fb(&snappercl15_fb_info);
+ platform_device_register(&snappercl15_nand_device);
+}
+
+MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
+ /* Maintainer: Ryan Mallon <ryan at bluewatersys.com> */
+ .phys_io = EP93XX_APB_PHYS_BASE,
+ .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
+ .boot_params = EP93XX_SDCE0_PHYS_BASE + 0x100,
+ .map_io = ep93xx_map_io,
+ .init_irq = ep93xx_init_irq,
+ .timer = &ep93xx_timer,
+ .init_machine = snappercl15_init_machine,
+MACHINE_END
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