[PATCH 1/1] mmp2: add handling on PMIC IRQ
Eric Miao
eric.y.miao at gmail.com
Tue Feb 2 19:14:40 EST 2010
On Tue, Jan 26, 2010 at 10:08 PM, Haojian Zhuang
<haojian.zhuang at gmail.com> wrote:
> From 43f04d3f0ab95721b5fd6b9590990ffa1b1eef1d Mon Sep 17 00:00:00 2001
> From: Haojian Zhuang <haojian.zhuang at marvell.com>
> Date: Wed, 27 Jan 2010 08:49:12 -0500
> Subject: [PATCH] mmp2: add handling on PMIC IRQ
>
> Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs
> to be cleared after PMIC IRQ occured. Now append the clear operation in
> irq chip handler.
>
> Signed-off-by: Haojian Zhuang <haojian.zhuang at marvell.com>
> ---
> arch/arm/mach-mmp/irq-mmp2.c | 7 +++++++
> 1 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
> index 41b29f6..761abe3 100644
> --- a/arch/arm/mach-mmp/irq-mmp2.c
> +++ b/arch/arm/mach-mmp/irq-mmp2.c
> @@ -62,7 +62,9 @@ static void _name_##_unmask_irq(unsigned int irq) \
> static void _name_##_irq_demux(unsigned int irq, struct irq_desc *desc) \
> { \
> unsigned long status, mask, n; \
> + unsigned long mfpr_pmic, data; \
> mask = __raw_readl(prefix##_MASK); \
> + mfpr_pmic = APB_VIRT_BASE + 0x1e000 + 0x2c4; \
> while (1) { \
> status = __raw_readl(prefix##_STATUS) & ~mask; \
> if (status == 0) \
> @@ -70,6 +72,11 @@ static void _name_##_irq_demux(unsigned int irq,
> struct irq_desc *desc) \
> n = find_first_bit(&status, BITS_PER_LONG); \
> while (n < BITS_PER_LONG) { \
> generic_handle_irq(irq_base + n); \
> + if ((irq_base + n) == IRQ_MMP2_PMIC) { \
> + data = __raw_readl(mfpr_pmic); \
> + __raw_writel(data | (1 << 6), mfpr_pmic); \
> + __raw_writel(data, mfpr_pmic); \
> + } \
> n = find_next_bit(&status, BITS_PER_LONG, n+1); \
> } \
> } \
I don't think this is probably the right way to go. There could be two
improvements:
1. move mfpr register manipulation into a dedicated function, e.g.
mmp2_clear_pmic_int() within mmp2.c
2. invent a pmic_mask_ack_irq() to replace the default one at
run-time, so to save the time that every 2nd level interrupt
handling has to go through the if (.... == IRQ_MMP2_PMIC) thing,
provided it does look like an ack operation to me.
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