[PATCH v4 5/7] OMAP3630: PM: Disable L2 cache while invalidating L2 cache
santosh.shilimkar at ti.com
Mon Dec 20 07:14:45 EST 2010
> -----Original Message-----
> From: Nishanth Menon [mailto:nm at ti.com]
> Sent: Monday, December 20, 2010 5:15 PM
> To: Santosh Shilimkar
> Cc: linux-omap; linux-arm; Jean Pihet; Kevin; Tony
> Subject: Re: [PATCH v4 5/7] OMAP3630: PM: Disable L2 cache while
> invalidating L2 cache
> Santosh Shilimkar wrote, on 12/20/2010 01:13 AM:
> >> This is be done according to ARM documentation. Currently this is
> >> identified
> >> as being needed on OMAP3630 as the disable/enable is done from
> >> side"
> >> while, on OMAP3430, this is done in the "secure side".
> > Can you point me to ARM doc which says " for L2 invalidation, the
> > controller
> > needs to be disabled" ?
> please see section 8.3 of the Cortex-A8 TRM
Yes. Have seen it and it doesn't say at least what your patch
description is saying.
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