[PATCH 0/40] Complete set of clocksource/sched_clock patches

[Russell King - ARM Linux]

On Sun, Dec 19, 2010 at 03:05:56PM +0100, Mikael Pettersson wrote:
> tmr = timer mode register
> tcr = timer counter register
> trr = timer reload register
> 
> When a timer is in periodic mode it reloads itself from its reload
> register when the counter register decrements to zero.

Ok.

>  >  Does trr need to be written in
>  > ->set_mode (if so that's another bug in this code)?
> 
> trr{0,1} need not and should not be changed after iop_time_init().

It sounds like trr0 needs to be written in ->set_mode's
CLOCK_EVT_MODE_PERIODIC path then, because with my patch, we never set
this register.  Or will trr0 be updated when we write tcr0 ?