[PATCH v4 5/5] OMAP: mailbox: use runtime pm for clk and sysc handling

Kanigeri, Hari h-kanigeri2 at ti.com
Thu Dec 16 11:32:41 EST 2010


Omar,

On Thu, Dec 16, 2010 at 12:47 AM, Omar Ramirez Luna <omar.ramirez at ti.com> wrote:
> Use runtime pm APIs to enable/disable mailbox clocks and
> to configure SYSC register.
>
> Based on the patch sent by Felipe Contreras:
> https://patchwork.kernel.org/patch/101662/
>
> Signed-off-by: Omar Ramirez Luna <omar.ramirez at ti.com>
> ---
>  arch/arm/mach-omap2/mailbox.c |   27 +++++----------------------
>  1 files changed, 5 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
> index 40ddeca..f5f72ba 100644
> --- a/arch/arm/mach-omap2/mailbox.c
> +++ b/arch/arm/mach-omap2/mailbox.c
> @@ -14,6 +14,7 @@
>  #include <linux/err.h>
>  #include <linux/platform_device.h>
>  #include <linux/io.h>
> +#include <linux/pm_runtime.h>
>  #include <plat/mailbox.h>
>  #include <mach/irqs.h>
>
> @@ -34,12 +35,8 @@
>  #define MAILBOX_IRQ_NOTFULL(m)         (1 << (2 * (m) + 1))
>
>  /* SYSCONFIG: register bit definition */
> -#define AUTOIDLE       (1 << 0)
>  #define SOFTRESET      (1 << 1)
> -#define SMARTIDLE      (2 << 3)
>  #define OMAP4_SOFTRESET        (1 << 0)
> -#define OMAP4_NOIDLE   (1 << 2)
> -#define OMAP4_SMARTIDLE        (2 << 2)
>
>  /* SYSSTATUS: register bit definition */
>  #define RESETDONE      (1 << 0)
> @@ -70,8 +67,6 @@ struct omap_mbox2_priv {
>        unsigned long irqdisable;
>  };
>
> -static struct clk *mbox_ick_handle;
> -
>  static void omap2_mbox_enable_irq(struct omap_mbox *mbox,
>                                  omap_mbox_type_t irq);
>
> @@ -91,13 +86,8 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
>        u32 l;
>        unsigned long timeout;
>
> -       mbox_ick_handle = clk_get(NULL, "mailboxes_ick");
> -       if (IS_ERR(mbox_ick_handle)) {
> -               printk(KERN_ERR "Could not get mailboxes_ick: %ld\n",
> -                       PTR_ERR(mbox_ick_handle));
> -               return PTR_ERR(mbox_ick_handle);
> -       }
> -       clk_enable(mbox_ick_handle);
> +       pm_runtime_enable(mbox->dev->parent);
> +       pm_runtime_get_sync(mbox->dev->parent);
>
>        if (cpu_is_omap44xx()) {
>                mbox_write_reg(OMAP4_SOFTRESET, MAILBOX_SYSCONFIG);
> @@ -130,12 +120,6 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
>        l = mbox_read_reg(MAILBOX_REVISION);
>        pr_debug("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f));
>
> -       if (cpu_is_omap44xx())
> -               l = OMAP4_SMARTIDLE;
> -       else
> -               l = SMARTIDLE | AUTOIDLE;
> -       mbox_write_reg(l, MAILBOX_SYSCONFIG);
> -

The OMAP4 mailbox sysconfig register bits are laid out differently
from previous OMAP mailbox's. Example is smart idle bit location is
different from previous OMAPs. Can I know as how are you handling this
aspect in hwmod code ?


Thank you,
Best regards,
Hari Kanigeri



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