[PATCH 2/4] Optionally flush entire dcache from v6_dma_flush_range

Catalin Marinas catalin.marinas at arm.com
Tue Dec 14 05:58:14 EST 2010


On 14 December 2010 04:57, John Stultz <john.stultz at linaro.org> wrote:
> From: Arve Hjønnevåg <arve at android.com>
>
> If CACHE_FLUSH_RANGE_LIMIT is defined, then the entire dcache will
> be flushed if the requested range is larger than this limit.
>
> CC: Nicolas Pitre <nicolas.pitre at linaro.org>
> CC: Russell King <linux at arm.linux.org.uk>
> Change-Id: I29277d645a9d6716b1952cf3b870c78496261dd0
> Signed-off-by: Arve Hjønnevåg <arve at android.com>
> Signed-off-by: John Stultz <john.stultz at linaro.org>
> ---
>  arch/arm/mm/cache-v6.S |   17 +++++++++++++++++
>  1 files changed, 17 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
> index 99fa688..92c66b4 100644
> --- a/arch/arm/mm/cache-v6.S
> +++ b/arch/arm/mm/cache-v6.S
> @@ -263,6 +263,11 @@ v6_dma_clean_range:
>  *     - end     - virtual end address of region
>  */
>  ENTRY(v6_dma_flush_range)
> +#ifdef CONFIG_CACHE_FLUSH_RANGE_LIMIT
> +       sub     r2, r1, r0
> +       cmp     r2, #CONFIG_CACHE_FLUSH_RANGE_LIMIT
> +       bhi     v6_dma_flush_dcache_all
> +#endif
>        bic     r0, r0, #D_CACHE_LINE_SIZE - 1
>  1:
>  #ifdef CONFIG_DMA_CACHE_RWFO

I'm not sure how CONFIG_CACHE_FLUSH_RANGE_LIMIT is defined but it
should depend on !CONFIG_DMA_CACHE_RWFO or just add this check to the
#ifdef. The D-cache flushing ops aren't broadcast on ARM11MPCore.

-- 
Catalin



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