[PATCH] ARM: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix

[Stephen Boyd]

On 12/09/2010 08:04 AM, Catalin Marinas wrote:
> On 24 November 2010 18:39, Valentine Barshak <vbarshak at mvista.com> wrote:
>> Updated according to the comments to avoid r/w outside the buffer and
>> used byte r/w for the possible unaligned data. Seems to work fine.
>>
>> Cache ownership must be acqired by reading/writing data from the
>> cache line to make cache operation have the desired effect on the
>> SMP MPCore CPU. However, the ownership is never aquired in the
>> v6_dma_inv_range function when cleaning the first line and
>> flushing the last one, in case the address is not aligned
>> to D_CACHE_LINE_SIZE boundary.
>> Fix this by reading/writing data if needed, before performing
>> cache operations.
>> While at it, fix v6_dma_flush_range to prevent RWFO outside
>> the buffer.
>>
>> Signed-off-by: Valentine Barshak <vbarshak at mvista.com>
>> Signed-off-by: George G. Davis <gdavis at mvista.com>
> I eventually found a bit of time to look at this. The patch looks fine to me:
>
> Acked-by: Catalin Marinas <catalin.marinas at arm.com>

Is this also a stable candidate? At least it applies cleanly to .35

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