[PATCH v2 09/15] ARM: mxs: Add clock support

[Shawn Guo]

Hi Uwe,

2010/12/9 Uwe Kleine-König <u.kleine-koenig at pengutronix.de>:
> Hello Shawn,
>
>> +static unsigned long name##_get_rate(struct clk *clk)                        \
>> +{                                                                    \
>> +     unsigned long parent_rate;                                      \
>> +     u32 reg, div;                                                   \
>> +                                                                     \
>> +     reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##sr);         \
>> +     div = (reg >> BP_CLKCTRL_##sr##_##ss##FRAC) & 0x3f;             \
>> +     parent_rate = clk_get_rate(clk->parent);                        \
>> +                                                                     \
>> +     return parent_rate / 1000 * 18 / div * 1000;                    \
>> +}
> 1000 isn't the most clever choice.  It might be for a human, but not for
> a machine.
>
> I'd suggest (untested):
>
>        return SH_DIV((parent_rate >> 8) * 18, div, 8);
>
> (don't know if 8 is a good value).  What is the range of div here?
>
The div range is 18 ~ 35.

-- 
Regards,
Shawn