generic irq handler and stack?

[Tim Sander]

Hi

> > The interrupt handling on the i.mx35x seems to handle only one interrupt
> > at a time. This generates larger then nessecary interrupt jitter. I am
> > currently investigating to reprogram the AVIC to enable higher priority
> > interrupts to interrupt lower priority interrupts. The mechanism is
> > outlined in section 13,3.8 of the IMX35 Reference Manual.
> 
> The kernel now runs _all_ interrupts with IRQs masked on the CPU.  See
> e58aa3d2d0cc01ad8d6f7f640a0670433f794922.
Thanks Russell for your  quick answer. But as far as i understand this is only
one step to get better interrupt latency on i.mx35x since the AVIC by default
only allows one interrupt at a time. So any idea which is the cleanest way to 
push the SPSR_irq register on the stack. I am currently a little lost between 
the common code, the arm and platform specific code, so any hint is welcome.

Thanks
Tim

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