amba clcd clock/timing check mismatch

[Russell King - ARM Linux]

On Mon, Aug 16, 2010 at 03:54:47PM -0700, Kevin Wells wrote:
> >From the include/linux/amba/clcd.h file, in the clcdfb_check() function...
> 
> #define CHECK(e,l,h) (var->e < l || var->e > h)
> 	if (CHECK(right_margin, (5+1), 256) ||	/* back porch */
> 	    CHECK(left_margin, (5+1), 256) ||	/* front porch */
> 	    CHECK(hsync_len, (5+1), 256) ||
> 	    var->xres > 4096 ||
> 
> These 4 checks don't match the actual values that can be
> generated by the CLCD controller. The minimum values for left
> and right horizontal porch and HSYNC width can go down to
> 1 clock.

Not quite - these restrictions deal with the restrictions for DMA
timing for STN panels as specified in the CLCD documentation -
clcdfb_check doesn't deal with the differences between STN and
active panels.

So it's not as simple as just reducing these down to allowing 1 clock
- that'd break STN panels.

> The maximum x resolution for the pl11x devices is 1024 pixels.

Yes, you seem to be right here.