No subject

not figured
out how to use type 2b and type 3b descriptors. It's not the fault of
DMA driver or
specification :-) It's actually upto the client to select the right type.

>> +
>> + =A0 =A0 lcfg->sghead =3D sgparams;
>> + =A0 =A0 lcfg->num_elem =3D nelem;
>> + =A0 =A0 lcfg->sgheadphy =3D padd;
>> + =A0 =A0 lcfg->pausenode =3D -1;
>> +
>> +
>> + =A0 =A0 if (NULL =3D=3D chparams)
> Minute point really. Better readability "ch_params"
OK

>> + =A0 =A0 dma_write(l, CDP(lch));
>> + =A0 =A0 dma_write((lcfg->sgheadphy), CNDP(lch));
>> + =A0 =A0 /**
>> + =A0 =A0 =A0* Barrier needed as writes to the
>> + =A0 =A0 =A0* descriptor memory needs to be flushed
>> + =A0 =A0 =A0* before it's used by DMA controller
>> + =A0 =A0 =A0*/
> Little bit of re-wording if you can.
> Also you don't wanted the double **
> =A0 =A0 =A0 =A0/*
> =A0 =A0 =A0 =A0 * Memory barrier is needed because data may still be
> =A0 =A0 =A0 =A0 * in the write buffer. The barrier drains write buffers a=
nd
> =A0 =A0 =A0 =A0 * ensures that DMA sees correct descriptors
> =A0 =A0 =A0 =A0 */
OK

>> + =A0 =A0 wmb();
>> + =A0 =A0 omap_start_dma(lch);
>> +
>> + =A0 =A0 /* Maintain the pause state in descriptor */
>> + =A0 =A0 omap_set_dma_sglist_pausebit(lcfg, lcfg->pausenode, 0);
>> + =A0 =A0 omap_set_dma_sglist_pausebit(lcfg, pauseafter, 1);
>> +
>> + =A0 =A0 /**
>> + =A0 =A0 =A0* Barrier needed as writes to the
>> + =A0 =A0 =A0* descriptor memory needs to be flushed
>> + =A0 =A0 =A0* before it's used by DMA controller
>> + =A0 =A0 =A0*/
> Description change if possible
OK

>> + =A0 =A0 wmb();
>> +
>> + =A0 =A0 /* Errata i557 - pausebit should be cleared in no standby mode=
 */
> This should have been

I couldn't understand this comment.

>> + =A0 =A0 sys_cf =3D dma_read(OCP_SYSCONFIG);
>> + =A0 =A0 l =3D sys_cf;
>> + =A0 =A0 /* Middle mode reg set no Standby */
>> + =A0 =A0 l &=3D ~(BIT(12) | BIT(13));
>> + =A0 =A0 dma_write(l, OCP_SYSCONFIG);