Why flush_cache_all() not including flushing L2 cache if the system has L2 cache?

[Russell King - ARM Linux]

On Mon, Nov 02, 2009 at 10:32:13AM +0800, Peter Chen wrote:
> I met a problem if the address is first used by cachable, then  
> uncachable. After that, the address will be filled with cachable value
> after that L2 cache line is evicted.

What _exactly_ are you trying to do?  Why are you apparantly mapping
something in as cacheable, and then making it uncacheable?