[PATCH RESEND v2 2/2] dt-bindings: nand: meson: refine Amlogic NAND controller driver
Liang.Yang
liang.yang at amlogic.com
Wed Mar 2 01:57:58 PST 2022
Hi Jerome,
On 2022/3/2 16:42, Jerome Brunet wrote:
> [ EXTERNAL EMAIL ]
>
>
> On Wed 02 Mar 2022 at 13:19, Liang.Yang <liang.yang at amlogic.com> wrote:
>
>> Hi Jerome,
>>
>> On 2022/2/28 19:36, Jerome Brunet wrote:
>>> [ EXTERNAL EMAIL ]
>>>
>>> On Thu 17 Feb 2022 at 14:33, Liang Yang <liang.yang at amlogic.com> wrote:
>>>
>>>> convert txt to yaml and refine the meson NFC clock document.
>>>>
>>>> Signed-off-by: Liang Yang <liang.yang at amlogic.com>
>>>> ---
>>>> .../bindings/mtd/amlogic,meson-nand.txt | 60 ----------------
>>>> .../bindings/mtd/amlogic,meson-nand.yaml | 70 +++++++++++++++++++
>>>> 2 files changed, 70 insertions(+), 60 deletions(-)
>>>> delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
>>>> create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
>>>> deleted file mode 100644
>>>> index 5794ab1147c1..000000000000
>>>> --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
>>>> +++ /dev/null
>>>> @@ -1,60 +0,0 @@
>>>> -Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
>>>> -
>>>> -This file documents the properties in addition to those available in
>>>> -the MTD NAND bindings.
>>>> -
>>>> -Required properties:
>>>> -- compatible : contains one of:
>>>> - - "amlogic,meson-gxl-nfc"
>>>> - - "amlogic,meson-axg-nfc"
>>>> -- clocks :
>>>> - A list of phandle + clock-specifier pairs for the clocks listed
>>>> - in clock-names.
>>>> -
>>>> -- clock-names: Should contain the following:
>>>> - "core" - NFC module gate clock
>>>> - "device" - device clock from eMMC sub clock controller
>>>> - "rx" - rx clock phase
>>>> - "tx" - tx clock phase
>>>> -
>>>> -- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
>>>> - controller port C
>>>> -
>>>> -Optional children nodes:
>>>> -Children nodes represent the available nand chips.
>>>> -
>>>> -Other properties:
>>>> -see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
>>>> -
>>>> -Example demonstrate on AXG SoC:
>>>> -
>>>> - sd_emmc_c_clkc: mmc at 7000 {
>>>> - compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
>>>> - reg = <0x0 0x7000 0x0 0x800>;
>>>> - };
>>>> -
>>>> - nand-controller at 7800 {
>>>> - compatible = "amlogic,meson-axg-nfc";
>>>> - reg = <0x0 0x7800 0x0 0x100>;
>>>> - #address-cells = <1>;
>>>> - #size-cells = <0>;
>>>> - interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
>>>> -
>>>> - clocks = <&clkc CLKID_SD_EMMC_C>,
>>>> - <&sd_emmc_c_clkc CLKID_MMC_DIV>,
>>>> - <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
>>>> - <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
>>>> - clock-names = "core", "device", "rx", "tx";
>>>> - amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
>>>> -
>>>> - pinctrl-names = "default";
>>>> - pinctrl-0 = <&nand_pins>;
>>>> -
>>>> - nand at 0 {
>>>> - reg = <0>;
>>>> - #address-cells = <1>;
>>>> - #size-cells = <1>;
>>>> -
>>>> - nand-on-flash-bbt;
>>>> - };
>>>> - };
>>>> diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
>>>> new file mode 100644
>>>> index 000000000000..671f0a8fdc7c
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
>>>> @@ -0,0 +1,70 @@
>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>> +%YAML 1.2
>>>> +---
>>>> +$id: http://devicetree.org/schemas/clock/amlogic,mmc-clkc.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
>>>> +
>>>> +maintainers:
>>>> + - liang.yang at amlogic.com
>>>> +
>>>> +properties:
>>>> + compatible:
>>>> + enum:
>>>> + - "amlogic,meson-gxl-nfc"
>>>> + - "amlogic,meson-axg-nfc"
>>>> +
>>>> + reg:
>>>> + maxItems: 2
>>>> +
>>>> + interrupts:
>>>> + maxItems: 1
>>>> +
>>>> + clocks:
>>>> + maxItems: 2
>>>> +
>>>> + clock-names:
>>>> + items:
>>>> + - const: "core", "device"
>>>> +
>>>> + "#clock-cells":
>>>> + const: 1
>>>> +
>>>> +required:
>>>> + - compatible
>>>> + - reg
>>>> + - interrupts
>>>> + - clocks
>>>> + - clock-names
>>>> + - "#clock-cells"
>>>> +
>>>> +additionalProperties: false
>>>> +
>>>> +examples:
>>>> + - |
>>>> + nand-controller at 7800 {
>>>> + compatible = "amlogic,meson-axg-nfc";
>>>> + reg = <0x0 0x7800 0x0 0x100>,
>>>> + <0x0 0x7000 0x0 0x1>;
>>> Please name the register ressources instead of relying on the order
>> ok
>>> Also, use the actual size of region, not the size you are using in the
>>> driver. AFAIK, the size of the 2nd region is not 0x1
>> yes, it should be 0x4 here, i will fix it.
>> we only need to use a 32bits SDEMMC_CLOCK register.
>> thanks.
>
> No, it is not the point.
> What register you need in the driver is not relevant.
> What is relevant is the actual size of the memory region - so it not 0x1
> or 0x4 ... more likely 0x800 from what I see in the AXG dts.
ok, i will fix it. thanks.
>
>>>
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
>>>> +
>>>> + clocks = <&clkc CLKID_SD_EMMC_C>,
>>>> + <&clkc CLKID_FCLK_DIV2>;
>>>> + clock-names = "core", "device";
>>>> +
>>>> + pinctrl-names = "default";
>>>> + pinctrl-0 = <&nand_pins>;
>>>> +
>>>> + nand at 0 {
>>>> + reg = <0>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> +
>>>> + nand-on-flash-bbt;
>>>> + };
>>>> + };
>>>> +
>>>> +...
>>>> \ No newline at end of file
>>> .
>
> .
More information about the linux-amlogic
mailing list