[PATCH] clk: meson: axg: fix the od shift of the sys_pll

[Jerome Brunet]

On Fri, 2018-01-19 at 10:09 +0800, Yixun Lan wrote:
> According to datasheet, the od shift of sys_pll is 16,
> fix the typo which introduced at previous commit.
> 
> Fixes: 78b4af312f91 ('clk: meson-axg: add clock controller drivers')
> Signed-off-by: Yixun Lan <yixun.lan at amlogic.com>

Applied to clk-meson next/drivers after fixing the commit message a bit
Thx

Jerome