[PATCH 1/2] ARM: dts: meson8b: extend ethernet controller description

[Martin Blumenstingl]

Hi Jerome,

On Tue, Jan 16, 2018 at 11:17 AM, Jerome Brunet <jbrunet at baylibre.com> wrote:
> On Tue, 2018-01-16 at 01:34 +0100, Emiliano Ingrassia wrote:
>> Extend ethernet controller description adding pin multiplexing and
>> setting the needed attributes in ethmac node.
>> As reported in S805 SoC manual, the MAC clock source is MPLL2 only.
>>
>> Signed-off-by: Emiliano Ingrassia <ingrassia at epigenesys.com>
>> ---
>>  arch/arm/boot/dts/meson8b.dtsi | 35 +++++++++++++++++++++++++++++++++--
>>  1 file changed, 33 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
>> index 7cd03ed3742e..3c66d9bdc3a8 100644
>> --- a/arch/arm/boot/dts/meson8b.dtsi
>> +++ b/arch/arm/boot/dts/meson8b.dtsi
>> @@ -185,6 +185,27 @@
>>                       #gpio-cells = <2>;
>>                       gpio-ranges = <&pinctrl_cbus 0 0 130>;
>>               };
>> +
>> +             eth_rgmii_pins: eth-rgmii {
>> +                     mux {
>> +                             groups = "eth_tx_clk",
>> +                                      "eth_tx_en",
>> +                                      "eth_txd1_0",
>> +                                      "eth_txd1_1",
>> +                                      "eth_txd0_0",
>> +                                      "eth_txd0_1",
>> +                                      "eth_rx_clk",
>> +                                      "eth_rx_dv",
>> +                                      "eth_rxd1",
>> +                                      "eth_rxd0",
>> +                                      "eth_mdio_en",
>> +                                      "eth_mdc",
>> +                                      "eth_ref_clk",
>> +                                      "eth_txd2",
>> +                                      "eth_txd3";
>> +                             function = "ethernet";
>> +                     };
>> +             };
>>       };
>>  };
>>
>> @@ -203,8 +224,18 @@
>>  };
>>
>>  &ethmac {
>> -     clocks = <&clkc CLKID_ETH>;
>> -     clock-names = "stmmaceth";
>> +     compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
>
> Does meson8 shared the same IP block ? is yes, then this compatible should
> probably be changed one level up, along with the regs
>
> If not, it means that ethmac node should not be defined in meson.dtsi but in
> meson8.dtsi and meson8b.dtsi
it's tricky - I have ordered a Meson8 board (which has not arrived
yet), but according to my findings:
- Meson6 uses the old binding
- Meson8 uses the same binding as Meson6
- Meson8b uses the new binding / same binding as GXBB
- Meson8m2 (which is mostly identical to Meson8) uses the same binding
as Meson8b / GXBB

> In any case, overloading the node like this really clean, even if it works.
my plan is to restructure the ethmac node once I have my Meson8 board:
- add the the "amlogic,meson6-dwmac" compatible and the 0xc1108108
register to meson6.dtsi and meson8.dtsi
- remove the "amlogic,meson6-dwmac" binding from meson.dtsi
- figure out whether meson8m2.dtsi (upcoming, on my TODO-list...)
should inherit meson8.dtsi or meson.dtsi

some more context:
Meson8 and Meson8m2 share a lot of functionality:
- SMP / CPU hotplug procedure
- CPU frequencies (OPP tables)
- pinctrl
however, there are some differences too:
- Meson8m2 uses the WDT layout from Meson8b
- Meson8m2 uses the same CPU temperature calibration procedure as Meson8b
- (not tested yet) Meson8m2 uses the Ethernet registers from Meson8b

in other words:
I think it's a good idea to restructure the ethmac node
however, I would prefer to do it outside of this series so we don't
have to do it twice (once with limited testing, then fixing some bugs
in a follow-up series once I could test it on Meson8)

>> +
>> +     reg = <0xc9410000 0x10000
>> +            0xc1108140 0x4>;
>> +
>> +     clocks = <&clkc CLKID_ETH>,
>> +              <&clkc CLKID_MPLL2>,
>> +              <&clkc CLKID_MPLL2>;
>> +     clock-names = "stmmaceth", "clkin0", "clkin1";
>> +
>> +     resets = <&reset RESET_ETHERNET>;
>> +     reset-names = "stmmaceth";
>>  };
>>
>>  &gpio_intc {
>

Regards
Martin