[PATCH 2/2] iio: adc: meson-saradc: add Meson8b SoC compatibility

Martin Blumenstingl martin.blumenstingl at googlemail.com
Sat Mar 25 11:28:03 PDT 2017


On Sat, Mar 25, 2017 at 7:13 PM, Jonathan Cameron <jic23 at kernel.org> wrote:
> On 25/03/17 16:29, Martin Blumenstingl wrote:
>> Meson GX SoCs however use some magic bits to prevent simultaneous (=
>> conflicting, because only consumer should use the FIFO buffer with the
>> ADC results) usage by the Linux kernel and the bootloader (the BL30
>> bootloader uses the SAR ADC to read the CPU temperature).
>> This patch changes guards all BL30 functionality so it is skipped on
>> SoCs which don't have it. Since the hardware itself doesn't know whether
>> BL30 is available the internal meson_sar_adc_data is extended so this
>> information can be provided per of_device_id.data inside the driver.
>>
>> Additionally the clocks "adc_clk" and "adc_sel" are not provided by the
>> clock-controller itself. "adc_sel" is not available at all. "adc_clk"
>> is provided by the SAR ADC IP block itself on Meson8b (and earlier).
>> This is already supported by the meson_saradc driver.
>>
>> Finally a new of_device_id for the Meson8b SoC is added so it can be
>> wired up in the corresponding DT.
>>
>> Signed-off-by: Martin Blumenstingl <martin.blumenstingl at googlemail.com>
> Looks sensible to me. Just fix those bits from Peter and we'll let it sit
> a few days on the list to see if anyone else wants to chip in.
OK, we'll have to wait for one of the DT-maintainers ACK (on the other
patch) anyways, so I'll re-spin this in a week or so and fix
everything that has come up until then



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