[PATCH v3 9/9] mmc: meson-gx: add support for HS400 mode
narmstrong at baylibre.com
Wed Feb 8 02:17:54 PST 2017
On 02/07/2017 10:35 PM, Heiner Kallweit wrote:
> Add support for HS400 mode.
> The driver still misses support for tuning, therefore
> highspeed modes like HS400 might not work under all
> circumstances yet.
> Successfully tested on a Odroid C2 (S905 GXBB).
> Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
> Reviewed-by: Kevin Hilman <khilman at baylibre.com>
> Tested-by: Kevin Hilman <khilman at baylibre.com>
> - extended commit message
> drivers/mmc/host/meson-gx-mmc.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
> diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
> index 3cc6334a..5a959783 100644
> --- a/drivers/mmc/host/meson-gx-mmc.c
> +++ b/drivers/mmc/host/meson-gx-mmc.c
> @@ -83,6 +83,7 @@
> #define CFG_RC_CC_MASK 0xf
> #define CFG_STOP_CLOCK BIT(22)
> #define CFG_CLK_ALWAYS_ON BIT(18)
> +#define CFG_CHK_DS BIT(20)
> #define CFG_AUTO_CLK BIT(23)
> + val &= ~CFG_DDR;
> + val &= ~CFG_CHK_DS;
I think these two values masking explains why it solves the issue we can have on some boards,
if u-boot does not remove these bits the HW will still behave in a bad mode.
It would be better to have a clean HS400/DDR mode later on and keep this to fix the eMMC init for now.
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