[LEDE-DEV] [PATCH 2/3] ag71xx: Remove ___cacheline_aligned from ring structs.

Rosen Penev rosenp at gmail.com
Tue Feb 6 21:07:30 PST 2018


On Tue, Feb 6, 2018 at 8:27 PM, Florian Fainelli <f.fainelli at gmail.com> wrote:
> On February 6, 2018 2:27:29 PM PST, Rosen Penev <rosenp at gmail.com> wrote:
>>Qualcomm's struct members and inner workings of their driver are all
>>different.
>>While this might make sense for their driver, it seems to hurt here. In
>>iperf3, i've seen inconsistent results including a drop of 100mbps on
>>an
>>Archer C7v4. This patch keeps the results high and relatively
>>consistent.
>>
>>Signed-off-by: Rosen Penev <rosenp at gmail.com>
>
> Do you use pahole to get a view of how the structure members are aligned and if there is room for reducing the holes and/or moving hot/frequently accessed members to a cache line aligned offset within the structure? If not, I would highly recommend using it and possibly providing the output before and after to show the improvement.
Never heard of pahole. I'm just backporting QCA patches since their
driver has some useful stuff.
>
> --
> Florian



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